Maths-III Assignments

Maths-III Assignments

• Homogeneous Linear Differential Equation(higher order)
• Linear Differential Educations with constant co-efficient and Variable Co-efficient (Euler Cauchy Equation)  
• Fourier Series
• Power series

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COA mid Sem -2 Syllabus

Mrs. D.R.Chaudhari

CENTRAL PROCESSING UNIT:

• Introduction
• General Register Organization
• Stack Organization
• Instruction format
• Addressing Modes
• Data transfer and manipulation
• Program Control
• Reduced Instruction Set Computer (RISC)

COMPUTER ARITHMETIC:

• Introduction
• Addition and subtraction
• Multiplication and Division Algorithms
• Floating Point Arithmetic
• Decimal Arithmetic Unit and Operations

 
Mr. V.C.Joshi
 
PIPELINE AND VECTOR PROCESSING:

• Parallel Processing
• Pipelining, Arithmetic Pipeline
• Instruction, Pipeline
• RISC Pipeline
• Vector Processing
• Array Processors

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DLD mid Sem -2 Syllabus

Mr. R.G.Patel
 
Simplification of Boolean Functions:

• Different types Map method
• Product of sum Simplification
• NAND or NOR implementation
• Don’t Care condition
• Tabulation method

Combinational Logic :

• Introduction
• Design Procedure
• Adder
• Subtractor
• Code Conversion,Universal Gate

Combinational Logic With MSI AND VLSI :

• Introduction
• Binary Parallel Adder
• Decimal Adder
• Magnitude Comparator
• Decoder
• Multiplexer
• ROM
• Programmable Logic Array

Mr. K.N.Kunwar
 
Registers Transfer Logic & Micro-Operation :

• Introduction
• Inter-register Transfer
• Arithmetic
• logic and shift Micro-Operations
• Conditional Control Statements
• Fixed-Point Binary Data
• Overflow
• Arithmetic Shifts
• Decimal Data
• Floating-Point Data
• Instruction Codes
• Design of Simple Computer

Processor Logic Design :

• Introduction
• Processor Organization
• Arithmetic Logic Unit
• Design of Arithmetic and logic circuit
• Design of ALU. Status Register
• Design of shifter
• Processor Unit
• Design of Accumulator

Control Logic Design :

• Introduction
• Control Organization
• Hard-Wired Control
• Micro-Program Control

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BE mid Sem -2 Syllabus

Mr. J.R.Prajapati
 
Transistor at Low Frequencies:
 

• Graphical Analysis of the CE configuration
• Two-Port Devices and the Hybrid Model
• Transistor Hybrid Model
• h-Parameters
• Conversion Formulas for the Parameters of Three Transistor Configurations Analysis of a Transistor Amplifier Circuit Using h Parameters
• Thevenin’s and Norton’s Theorems and Corollaries
• Emitter Follower
• Comparison of Transistor Amplifier Configurations
• Linear Analysis of a Transistor Circuit
• Miller’s Theorem and its Dual
• Cascading Transistor Amplifiers
• Simplified CE Hybrid Model
• Simplified Calculations for the CC Configuration
• CE Amplifier with an Emitter Resistance
• High Input Resistance Transistor Circuits

 
Mr. K.N.Kunwar
 
 
Field Effect Transistors:
 

• Junction FET
• Pinch-Off Voltage
• JFET Volt-Ampere Characteristics
• FET Small-Signal Model
• MOSFET, Digital MOSFET Circuits
• Low Frequency CS and CD Amplifiers
• Biasing the FET
• The FET as a Voltage Variable Resistor
• CS Amplifier at High Frequencies
• CD Amplifier at High Frequencies

 
 
Power Circuits and Systems:
 

• Class A large Signal Amplifiers
• Second Harmonic Distortion
• Higher –Order Harmonic Generation
• Transformer Coupled Audio Power Amplifier
• Efficiency
• Push-Pull Amplifiers
• Class B Amplifiers
• Class AB Operation
• Regulated Power Supplies
• Series Voltage Regulator

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DFS mid Sem -2 Syllabus

Ms. B.R.Bhatt

Ø  Algorithm Infix to Postfix,

Ø  Algorithm evalution of postfix Notations

Ø  Algorithm string belongs to grammers

Ø  Algorithm for stack operations(Push ,POP,PEEP & change)

Ø  Sparse Matrix

Ø  Recursion

Ø  Tree-Definitions and Concepts

Ø  Representation of binary tree

Ø  Binary tree traversal (Inorder, postorder, preorder)

Ø  Threaded binary tree

Ø  Binary search trees

Ø  Construct tree from traversal Sequence

Mrs. D.R.Chaudhari:-

LINKED LIST

Ø  Insertion and deletion Doubly Linked list

GRAPH

Ø  Graph-Matrix Representation Of Graphs

Ø  Elementary Graph operations,(Breadth First Search, Depth First Search,Spanning Trees, Shortest path, Minimal spanning tree )

Hashing

Ø  The symbol table

Ø  Hashing Functions

Ø  Collision-Resolution Techniques

Ø  File Structure:

o   Concepts of fields

o   records and files

o   Sequential, Indexed and Relative/Random File Organization

o   Indexing structure for index files

o   hashing for direct files

o   Multi-Key file organization and access methods.

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DBMS mid Sem -2 Syllabus

Transaction Management :
 
         Transaction concepts

         properties of transactions

         serializability of transactions

         testing for serializability

         System recovery

         Two- Phase Commit protocol

         Recovery and Atomicity

         Log-based recovery

         concurrent executions of transactions and related problems, Locking mechanism

         solution to concurrency related problems, deadlock

         two-phase locking protocol

         Isolation

         Intent locking
   
Security:

 
        Introduction

        Discretionary access control

        Mandatory Access Control

        Data Encryption

SQL Concepts:
      
     structure – creation, alteration


       defining constraints – Primary key, foreign key, unique, not null, check, IN  operator

       aggregate functions

       Built-in functions* –numeric, date, string functions, set operations, sub-queries, 

       

       correlated 

       sub-queries

       Join

        view and its types.

*Explanation Requires




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AIM of this Blog

FETR CSC DEPARTMENT